PhD Oral Defense in Faculty of Science and Technology, by Mr. Jian YANG, on 11 Feb 2025

Dear Colleagues and Students,

 

I am pleased to announce that, Mr. Jian YANG, a PhD candidate in Department of Electrical and Computer Engineering in Faculty of Science and Technology, is going to have his oral defense on 11 Feb 2025 (Tue). You are welcome to attend the oral defense.

 

Date:

11 Feb 2025 (Tue)

Time:

16:00

Venue:

N21-3004

Thesis Title:

CMOS Clock Generator and VCSEL Driver for High-Speed Wireline Communications

 

Examination Committee

Chair:

Prof. Man Kay LAW, FST, UM

Supervisor:

Prof. Jun YIN, Associate Professor, Department of Electrical and Computer Engineering (ECE), FST & IME, UM

Co-Supervisor:

Prof. Quan PAN, Professor, School of Microelectronics, Southern University of Science and Technology

Members:

Prof. Chi Seng LAM, Associate Professor, Department of Electrical and Computer Engineering (ECE), FST & IME, UM

Prof. Yatao PENG, Assistant Professor, Department of Electrical and Computer Engineering (ECE), FST & IME, UM

Prof. Chao FAN, Associate Professor, School of Microelectronics, Xi’an Jiaotong University

 

Kindly note that video and/or audio recording is PROHIBITED while the oral defense is in progress.

Thank you for your kind attention.

Faculty of Science and Technology